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Xilinx FPGA-Based Radio Hardware Setup

Support Package Hardware Setup

You must successfully set up communication between the host and the radio before you can work with the Support Package for Xilinx® FPGA-Based Radio. Follow these steps to install software and configure the host computer, then use the check procedures to verify a connection. The host computer can be a desktop or a laptop but must contain at least one dedicated gigabit network interface card (NIC) for connecting to the FPGA-based radio.

Hardware Setup Instructions

    Notes  

    • These instructions assume you have already installed the Support Package for Xilinx FPGA-Based Radio. If you have not, see Install Xilinx FPGA-Based Radio Support Package.

    • These instructions assume you have one computer and a single NIC.

      If you would like to set up two radios on one host to use the Receiver-Transmitter examples included in this support package, see special considerations under Setup For Two Radios—One Host Examples.

    • You can use a pluggable USB to Gigabit Ethernet LAN adapter instead of a NIC; the instructions are the same.

Follow these hardware setup instructions in this exact order:

  1. Set Up Support Package in MATLAB.

  2. Configure Host Computer.

  3. Load FPGA Programming File.

  4. Verify Hardware Setup.

If you are hooking up two radios to the same host, see the notes in Setup For Two Radios—One Host Examples before beginning.

Set Up Support Package in MATLAB

Function sdrsetup sets up architecture-specific environment variables that enable communication between MATLAB® or Simulink® and an SDR device before using the Support Package for Xilinx FPGA-Based Radio.

Enter the following command at the MATLAB command prompt:

sdrsetup

    Note:   You must perform this software setup at the start of every MATLAB session in which you plan to use this support package. You can automate this step for future sessions by adding sdrsetup to your startup.m file. See Specifying Startup Options in MATLAB Startup File.

Configure Host Computer

Ethernet Requirements

Configure the host computer (Windows® 7 or Linux®) to communicate with the FPGA hardware.

  • You must have a dedicated gigabit Ethernet card for the FPGA hardware.

  • If you also want simultaneous Internet access and you do not have a wireless connection, your host computer requires a second Ethernet card.

  • Connect your FPGA-based radio to the Ethernet card on your host computer directly with an Ethernet cable.

    Note:   Some Ethernet cards may not be able to support high data throughput. You might encounter such cases if you set the decimation/interpolation rate of your FPGA device to a low value; for example, 4. Intel® chipsets provide a high quality connection in such cases.

Configure Windows 7

Configure the Ethernet card for your FPGA hardware.

  1. Open the Windows Control Panel from the Start menu.

  2. Set View by: to Category if it is not already set this way.

  3. Click Network and Internet.

  4. Click Network and Sharing Center.

  5. Click Change adapter settings on the left pane.

  6. Right-click the local area network connection that is connected to the FPGA device and select Properties from the context menu.

    • If an unused NIC is available, the local area connection appear as Unidentified network.

    • If you plan to repurpose your NIC, select the local area connection that you plan to use for the FPGA device.

    • If you have only one NIC, check if you can connect wirelessly to the existing local area network. If you can, you can use the NIC for the FPGA device.

    • You can use a pluggable USB to Gigabit Ethernet LAN adapter instead of a NIC; the instructions are the same.

  7. On the Networking tab of the Properties dialog box, clear all options except Internet Protocol Version 4 (TCP/IPv4). Other services, particularly anti-virus software, can cause intermittent connection problems with the FPGA radio.

  8. Double-click Internet Protocol Version 4 (TCP/IPv4).

  9. On the General tab, select Use the following IP Address.

  10. Set the host IP Address. The address depends on the RF card that you are going to use. Select one of the following to set the host IP address:

    • ADI: set IP Address to 192.168.2.X, where X is any number between 3 and 254.

    • Epiq Solutions: set IP Address to 192.168.0.X, where X is any number between 3 and 254.

    Example shown is for ADI.

    If your FPGA-based radio is on another subnet (the first three octets of the IP address field are not 192.168.2 for ADI or 192.168.0 for Epiq), then enter the same subnet number in the IP address.

      Note:   The IP address is hard-coded in the FPGA bitstream. For the bitstreams that are supplied with the Xilinx FPGA-Based Radio support package and which you will use for the initial setup, you do not need to change any other subnet. You can specify a different IP address using targeting, see Implement SDR Targeting .

  11. Leave the subnet mask set to the default value 255.255.255.0.

  12. Click OK.

  13. Next, go to Load FPGA Programming File. The FPGA image must be loaded before you can communicate with the FPGA radio.

Configure Linux

Set the host Ethernet interface with a static IP address to enable communication with the board.

  1. Determine which address is correct for your board. The subnet — the first three octets of the IP address field — depends on the board's IP address, and the ones listed in these instructions are the ones you will most likely use.

    • For ADI: Set IP Address to 192.168.2.X, where X is any number between 3 and 254.

    • For Epiq Solutions: Set IP Address to 192.168.0.X, where X is any number between 3 and 254.

    If your FPGA-based radio happens to be on another subnet, then use the same subnet number as the radio for the IP address.

      Note:   The IP address is hard-coded in the FPGA bitstream. For the bitstreams that are supplied with the Xilinx FPGA-Based Radio support package and which you will use for the initial setup, you do not need to change any other subnet. You can specify a different IP address using targeting, see Implement SDR Targeting .

  2. Set this value using the ifconfig command.

    % sudo ifconfig ethZ 192.168.X.Y netmask 255.255.255.0 

    Where ethZ is the name of the host Ethernet port (usually eth0, eth1, etc.), and X and Y are the third and fourth octet of the IP address, respectively, for the host. You might need to enter a password to use the sudo command.

  3. Enter the following command in the shell to check that the changes took effect:

    %ifconfig ethZ

    ethZ is the name of the host Ethernet port you just set in the previous step.

    Example shown is for an Epiq Bitshark™ board.

  4. Next, go to Load FPGA Programming File. The FPGA image must be loaded before you can communicate with the FPGA radio.

Load FPGA Programming File

You must load an FPGA programming file onto the FPGA-based radio before you can communicate with it.

There are two ways to load the FPGA programming file. Choose the method you prefer:

Load FPGA Programming File Using CF Card

Load FPGA programming file using CF card and SystemAce.

  1. Insert the CF card from the FPGA board into your computer's CF card reader.

  2. Copy all the files in <sdrfroot>/bin/SystemACE, located in the SDR support package root folder, to the top level of the CF card via your OS.

    • You can use function sdrfroot to find the SDR support package root:.

      >> sdrfroot
      
      ans =
      
      C:\MATLAB\SupportPackages\R2013b\sdrf

      In this example, the files to be copied are in C:\MATLAB\SupportPackages\R2013b\sdrf\bin\SystemACE.

    • The folder and file must be located at the top level of the CF card; that is, not under /SystemACE.

    • Answer in the affirmative to any prompts checking to see if you want to copy over existing files or folders.

  3. Replace the CF card into the card reader on the FPGA board.

  4. Set the jumper settings on the development board to use the SystemACE loader.

    • For ML605:

      1. Set S1 switch 4 to ON.

      2. Each supported board has a configuration file located in the SDR_HSP/ folder, in the format cfgx, where x is 0 through 5. In the table below, find the board you are using. Then, for S1 switches 1–3, set each switch as shown in the third column, labeled Switch Position, where S1 switch 1 is the least significant bit and S1 switch 3 is the most significant bit.

        BoardCFG fileSwitch Position
        Epiq Bitshark ML605 RevBcfg21=off, 2=on, 3=off
        Epiq Bitshark ML605 RevCcfg31=on, 2=on, 3=off
        ADI ML605 RevBcfg41=off, 2=off, 3=on
        ADI ML605 RevB_subnet 20 (alternative bitstream for two radios-one host examples)cfg51=on, 2=off, 3=on

        The following image shows the jumper switches on an ML605 board, set for ADI ML605 RevB.

      3. Power cycle or press SW3 to reload the image.

      See the ML605 Hardware User Guide, UG534, for more detailed information.

    • For SP605:

      1. Set SW1 switch M[1] to ON and switch M[0] to OFF.

      2. Set S1 switch 4 to ON.

      3. Each supported board has a configuration file located in SDR_HSP/, in the format cfgx, where x is 0 through 5. In the table below, find the board you are using. Then, for S1 switches 1–3, set each switch as shown in the third column, labeled Switch Position, where S1 switch 1 is the least significant bit and S1 switch 3 is the most significant bit.

        BoardCFG fileValue
        Epiq Bitshark SP605 RevBcfg01=off, 2=off, 3=off
        Epiq Bitshark SP605 RevCcfg11=on, 2=off, 3=off

        The following image shows the jumper switches on an SP605 board, set for Epiq Bitshark SP605 RevB.

      4. Power cycle or press SW9 to reload the image.

      See the SP605 Hardware User Guide, UG526, for more detailed information.

Load FPGA Programming File Using JTAG-USB Cable

These instructions load the default fixed bitstream that ships with the support package onto the FPGA radio via the JTAG-USB cable.

  1. Install Xilinx ISE Design Suite—Logic Edition. This free version of Xilinx ISE includes a copy of iMPACT.exe.

      Note:   If you already have a version of Xilinx ISE with iMPACT on your system, you do not need to perform this step. Go to step 2.

  2. Connect the JTAG USB cable to the host and board.

  3. Call function sdrsetup with the name and path of your installation of Xilinx iMPACT.exe:

    • For Windows, enter the following at the MATLAB command prompt:

      sdrsetup('ToolName', 'Xilinx iMPACT', 'ToolPath', '{path to iMPACT.exe}');

      Where {path to iMPACT.exe} is the path to your iMPACT.exe installation, for example, 'C:\Xilinx\14.6\ISE_DS\ISE\bin\nt64\impact.exe'.

    • For Linux, enter the following in the command shell:

      sdrsetup('ToolName', 'Xilinx iMPACT', 'ToolPath', '{path to iMPACT.exe}', 'LibUSBPath','{path to where libusb is located}')

      For example:

      sdrsetup('ToolName', 'Xilinx iMPACT', 'ToolPath', '/hdltools/Xilinx/14.6/ISE_DS/ISE/bin/lin64/impact', 'LibUSBPath', '/hdltools/lib/libusb/64bit');

      You must provide the proper paths to the iMPACT exectuable and libusb on your computer.

  4. Call function sdrload to load the fixed bitstream onto the FPGA radio:

    sdrload('Device',DevelBoard, 'RFBoard',RFBoard);

    Where:

    • DevelBoard is one of the following:

      • Xilinx ML605

      • Xilinx SP605

    • RFBoard is one of the following:

      • ADI FMCOMMS1 RevB

      • Epiq Bitshark RevB

      • Epiq Bitshark RevC

    • You can also optionally add a logical name for a JTAG cable. You may need to do this if you have more than one JTAG cable connected. See thesdrload reference page for details.

    For example:

    sdrload('Device','Xilinx ML605', 'RFBoard','ADI FMCOMMS1 RevB'); 

    If you are attaching two separate radios, call sdrload for each radio. For example:

    sdrload('Device','Xilinx ML605','RFBoard','ADI FMCOMMS1 RevB','FPGAImage',fullfile(sdrfroot(),'bin','XilinxML605ADIFMCOMMS1RevB.bit'))
    sdrload('Device','Xilinx ML605','RFBoard','ADI FMCOMMS1 RevB','FPGAImage',fullfile(sdrfroot(),'bin','XilinxML605ADIFMCOMMS1RevB_subnet20.bit'))
    

If the download is successful, you will see a message similar to the following:

After you have loaded the FPGA programming file, proceed to Verify Hardware Setup.

Verify Hardware Setup

You can check FPGA hardware connections to your network using the SDR function sdrinfo.

  1. Enter the following command:

    hwinfo = sdrinfo(IPAddress)

    Where IPAddress is the IP Address of the radio, for example:

    RF BoardRadio Default IP Address
    ADI FMCOMMS
    hwinfo = sdrinfo('192.168.2.2');

    If you are hooking up two radios, you can check the second radio using this IP address:

    hwinfo = sdrinfo('192.168.20.2');
    Epic Bitshark
    hwinfo = sdrinfo('192.168.0.2');

      Note:   It is important that you remember to use the IP address of the radio, not the host IP address.

    • If sdrinfo is successful, MATLAB returns a hardware information structure. It may look similar to the following:

       hwinfo = sdrinfo('192.168.2.2')
      
      hwinfo = 
      
                     Version: 'SDRf R2013b.3.81'
                 Motherboard: [1x39 char]
                     RFBoard: [1x126 char]
                      HasDDC: 'Yes'
                HasRxUserDUT: 'No'
                   HasRxPath: 'Yes'
                      HasDUC: 'Yes'
                HasTxUserDUT: 'No'
                   HasTxPath: 'Yes'
          DUTTargetFrequency: '125000000 Hz'
              BuildTimestamp: '2013-08-08 22:35:50'
    • If sdrinfo returns an empty cell array, for example:

      >> hwinfo=sdrinfo('192.168.2.2')
      
      hwinfo = 
      
           {}
      

      Then check for one of the following conditions:

      • An improperly specified IP address

      • An improperly configured network card on the host

      • An incompatible network card on the host

      • Host port blocking or antivirus software

      • An unsuccessful FPGA programming file download, or you did not load the FPGA programming file that ships with the Support Package for Xilinx FPGA-Based Radio before conducting these checks. See Load FPGA Programming File.

      • If you encounter any other error or issue, see Xilinx FPGA-Based Radio Processing Errors and Fixes.

  2. If the connection is successful, test it by running one of the provided examples. To see a full index of the features Examples for the Xilinx FPGA-Based Radio Support Package, enter the following command at the MATLAB command prompt:

    >>sdrexamples

Setup For Two Radios—One Host Examples

If you would like to set up two radios on the same host so that you may develop both a transmitter and a receiver, follow these instructions:

  • You must have two dedicated Ethernet cards, one for each radio. If you want to connect to the internet, you will need a third Ethernet card or a wireless connection.

  • Each card must have a different MAC address.

  • In general, you will follow the steps described in Support Package Hardware Setup, performing each step twice, once for each radio (for example, Windows or Linux host configuration). Note that you must also make the following adjustments:

    • When you Load FPGA Programming File, call sdrload twice, once for each radio but using different bitstreams (one default —XilinxML605ADIFMCOMMS1RevB.bit, and one alternative—XilinxML605ADIFMCOMMS1RevB_subnet20.bit):

      • Radio #1:

        sdrload('Device','Xilinx ML605','RFBoard','ADI FMCOMMS1 RevB','FPGAImage',fullfile(sdrfroot(),'bin','XilinxML605ADIFMCOMMS1RevB.bit'))
        
      • Radio #2:

        sdrload('Device','Xilinx ML605','RFBoard','ADI FMCOMMS1 RevB','FPGAImage',fullfile(sdrfroot(),'bin','XilinxML605ADIFMCOMMS1RevB_subnet20.bit'))
        
    • Perform Verify Hardware Setup on each radio. Each radio must be located at a different IP address. The following are examples of calling sdrinfo to verify the connections to two ADI FMCOMMS radios at their default IP addresses:

      • Radio #1:

        hwinfo = sdrinfo('192.168.2.2')
      • Radio #2:

        hwinfo = sdrinfo('192.168.20.2')
  • Each radio must be located at a different IP address. In the block mask or via the System object™ properties, set the IP address for each radio to a unique value, as shown here for an ADI FMCOMMS System object (values shown are default for ADI FMCOMMS radios):

    >> rx = comm.SDRADIFMCOMMSReceiver('IPAddress','192.168.2.2'); 
    >> tx = comm.SDRADIFMCOMMSTransmitter('IPAddress','192.168.20.2');
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